Brian Fahs
Advanced Computing Systems Research Group
261 Coordinated Sciences Laboratory

University of Illinois at Urbana-Champaign
Email: bfahs@crhc.uiuc.edu
Phone: 217-333-4419

 

INTERESTS:

My research focus involves fusing microarchitecture and runtime systems. Early work included the investigation of a hardware-based dynamic optimization system known as rePLay. This work resulted in multiple publications and has caught industry attention. More recently, I designed a hardware implementation of an optimizer that performs low-level compiler optimizations. This optimizer can be placed in the pipeline of a modern processor for continuous optimization and can also be incorporated as part of an offline optimizer for a rePLay-style implementation. I am currently in the process of evaluating new and exciting opportunities provided by this optimization hardware.

In addition to these interests, I also have spent a significant amount of time studying and working with operating systems and compilers.

EDUCATION:

University of Illinois at Urbana-Champaign
Ph.D., Electrical Engineering
December 2005
GPA: 3.96

University of Illinois at Urbana-Champaign
M.S., Electrical Engineering
May 2003
GPA: 3.96

University of Illinois at Urbana-Champaign
B.S., Computer Engineering
August 2000
GPA: 3.86

PUBLICATIONS:

B. Fahs, T. Rafacz, S. J. Patel, and S. S. Lumetta, 'Continuous Optimization,'
In Proceedings of the 32nd International Symposium on Computer Architecture, June 2005.

B. Fahs, A. Mahesri, F. Spadini, S. J. Patel, and S. S. Lumetta,
'The Performance Potential of Trace-based Dynamic Optimization,'
University of Illinois Technical Report, UILU-ENG-04-2208, November 2004.

B. Fahs, T. Rafacz, S. J. Patel, and S. S. Lumetta,
'Continuous Optimization,'
University of Illinois Technical Report, UILU-ENG-04-2207, August 2004.

Y. Chou, B. Fahs, and S. Abraham,
'Microarchitecture Optimizations for Exploiting Memory-Level Parallelism,'
In Proceedings of the 31st International Symposium on Computer Architecture, June 2004.

B. Fahs, S. Nair, and S. Abraham,
'Method and Structure for Monitoring Pollutions and Prefetches Due to Speculative Accesses,'
Patent Pending, Sun Microsystems, Inc., 2004.

F. Spadini, B. Fahs, S. J. Patel, and S. S. Lumetta
'Improving Quasi-Dynamic Schedules Through Region Slip,'
In Proceedings of the First International Symposium on Code Generation and Optimization, April 2003.

B. Slechta, D. Crowe, B. Fahs, M. Fertig, G. A. Muthler, J. Quek, F. Spadini, S. J. Patel, and S. S. Lumetta,
'Dynamic Optimization of Micro-Operations,' In Proceedings of the 9th International Symposium on
High-Performance Computer Architecture, February 2003.

B. Fahs, 'An Analysis of a Novel Approach to Dynamic Optimization,'
Master's Thesis, January 2003.

B. Fahs, S. Bose, M. M. Crum, B. Slechta, F. Spadini, T. Tung, S. J. Patel, and S. S. Lumetta
'Performance Characterization of a Hardware Mechanism for Dynamic Optimization,'
In Proceedings of the 34th ACM/IEEE International Symposium on Microarchitecture, December 2001.

B. Fahs, R. Hundt, and T. Krishnaswamy,
'Method and System to Analyze Inlined Functions,'
Patent Pending, Hewlett-Packard, Inc., 2001.

B. Fahs, R. Hundt, and T. Krishnaswamy,
'Method and System to Instrument Virtual Function Calls,'
Patent Pending, Hewlett-Packard, Inc., 2001.

S. S. Lumetta, S. J. Patel, B. Fahs, and S. Bose,
'Symbolic Verification of Dynamic Optimization in Microprocessors,'
In Fast Abstracts, Dependable Systems and Networks, July 2001.

INDUSTRY EXPERIENCE:

Sun Microsystems, Inc., May 2002 - August 2005
Supervisor: Santosh Abraham
Summary: As a member of the Architecture and Advanced Development group, I am involved in the investigation of future computer architecture designs. During my tenure, I have also contributed to a publication, and I have filed a patent application.

Hewlett-Packard, Inc. May 2001 – August 2001
Supervisor: Tara Krishnaswamy
Summary: As part of the Caliper development team, I developed part of the C++ support for the Caliper dynamic instrumentation product. This work has since been released as part of the product and resulted in two patent applications.

Motorola, Inc., May 2000 – May 2001
Supervisor: Svetlana Sowers
Summary: As part of the Advanced Software Systems group, I aided in developing cellular phone software to interface between various bluetooth devices and Motorola’s upcoming phones. I also worked on a series of tools to analyze the bluetooth protocol.

HONORS:

Rambus Computer Engineering Fellowship, 2005
Intel Foundation Ph.D. Fellowship Award, 2004
University of Illinois Engineering Expo Scholarship, 1999
Member of Tau Beta Pi Engineering Honors Society
Member of Eta Kappa Nu Electrical Engineering Honors Society