Computer Engineering Seminar

Fall 2007 Schedule

All seminars are scheduled for 4:00pm unless otherwise noted.

 

Date
Location
Speaker
Title
Host
August

28

B02 CSL

Gul Agha, UIUC

Programming the Future

Rakesh Kumar
September 4 B02 CSL

Sanjay Patel, UIUC

Tales from the Field: Designing High-Performance Chips for the Video Gaming Market Rakesh Kumar
  11 B02 CSL

Todd Coleman, UIUC

A Stochastic Control Approach to Variable Length Menus in P300 Neural Communication Prostheses Rakesh Kumar
  18 B02 CSL

Glenn Reinman, UCLA

Architectural Acceleration of Real-Time Physics

Sanjay Patel

  25 B02 CSL    

 

  27, 3:00pm B02 CSL Anil Jain, Cavium Networks What’s All the Fuss About Multi-Core Architectures?

Sanjay Patel

October

2

B02 CSL

  9 B02 CSL

Deming Chen, UIUC

3D nFPGA: A Three Dimensional CMOS/Nanomaterial Hybrid FPGA Architecture Rakesh Kumar
  16

B02 CSL

Tim Bretl, UIUC

Control of Micro-scale Locomotion and Manufacturing Processes Rakesh Kumar
  23

B02 CSL

Ron Cytron, Washington Univ.

A Scalable Architecture for High-Throughput Regular-Expression Pattern Marching

Rakesh Kumar

  30

B02 CSL

Doug Burger, Univ. of Texas

Bulldozers, Chainsaws, and Termites: The False Choice of Fixed-Granularity Systems

Rakesh Kumar

November 6 B02 CSL

David Wood, University of Wisconsin

Performance Pathologies in Hardware Transactional Memory Rakesh Kumar
  13

B02 CSL

ITI Distinguished Lecture, Charles C. Palmer, I3P

 

William H. Sanders
  20 - NO SEMINAR  

Thanksgiving Break

   
  27 B02 CSL

Norm Jouppi, HP

The Future Evolution of High-Performance Microprocessors Rakesh Kumar
December

4

B02 CSL

CANCELLED

David Padua, UIUC

 

Programmer Productivity and Autotuning Rakesh Kumar
The Computer Engineering seminar is generously supported by HP.