3pm, Thursday, Sept 27th 2007
B02 CSL

Abstract:

In this talk, Mr. Jain will cover the evolution IC technology over past three decades and discuss how classical laws of scaling are facing uphill challenge against power dissipation and process variations. He will discuss Cavium Networks adoption of the multi-core architecture approach to deliver best power and performance per square mm. He will present micro-architecture and design details of the Octeon chip, a 16-processor chip with multiple co-processors for networking and security applications.

Bio:

Anil Jain is Vice President of IC Engineering at Cavium Networks, and is a founding management team member.
Prior to Cavium, he was at Compaq Computer, where he led the development of 1.2 GHz, Alpha 21364 micro-processor chip. Prior to that, he was Senior Consulting Engineer at Digital Equipment Corporation (DEC) when DEC was acquired by Compaq Computer. He has worked on designing various components of several generations of DEC Alpha processors including the Alpha 21164 and 21364, and the CMOS VAX CPU. He has 5 patents issued and has published several papers in leading technical journals and conferences including the ISSCC. His technical interests are in areas of high-speed digital circuit design and memory sub-systems. He received an MSEE from the University of Cincinnati, OH.