The  Research Group
|
|
Illinois Microarchitecture Project utilizing Advanced Compiler Technology
|
 |
Currently at Intel Corporation.
Email: isteiner at crhc dot uiuc dot edu
|
| Resume |
|
[ doc |
pdf |
ps |
html |
txt
] ** Last updated: September 2006 **
|
| Biography |
B.S. with Highest Honors, Computer Engineering, University of Illinois, 2003
M.S., Electrical Engineering, University of Illinois, December 2005
Ian started his Undergraduate work at the U of I in 1999. During the
summers after his Freshman and Sophomore years, he worked in a software
group at Motorola. Ian then spent the summer after his junior year,
along with the Fall semester working for Intel's Flash Products Group in
Folsom, CA. During the summer of 2004, he worked at the IBM TJ Watson
Research Center doing performance analysis.
Ian joined the IMPACT research group during the Spring of 2003. He
worked on the Linux Kernel and Data Speculation for the IA64
architecture. He is now investigating parallel compilation techniques.
Ian was a board member for both the IEEE and Eta Kapp Nu. He was the
recipient of the Eta Kappa Nu Outstanding Senior Award, the Intel
Operational Excellence Award, an ECE Distinguished Fellowship,
an IBM Bravo Award, and an Honorable Mention for an NSF Fellowship.
Ian accepted a position with Intel in Portland working on Xeon performance analysis.
|
| Research/Work Interests |
- Multi-threaded compilation
- Performance Analysis
- System Architecture
|
|
My research has generally focused on compilers and performance analysis. My
interests and experiences cover various aspects of hardware and software, and I
am seeking a position in one of the following areas: compilers, operating
systems, architecture, and other low-level applications, preferably in
system-level performance analysis and/or optimization. I enjoy working and
learning with other people on challenging problems.
|
| Skills and Qualifications |
|
Two and a half years of research in compilers and performance analysis and one
and a half
years of industry experience have positioned me to make significant
contributions to projects in industrial research and/or development. During my
work on the IMPACT compiler, a large-scale application, I have broadened my
knowledge of architecture and compilers and improved my development and
debugging skills. I also have extensive experience in performance analysis with
the POWER4 and Itanium2 architectures, where I have used a combination of
hardware and system-level performance monitoring tools. Debugging the Linux
kernel and administering my own web server for five years have provided me with
a commanding knowledge of Linux systems. My research group is very team-oriented
and I have built interpersonal and leadership skills in this environment;
currently I help manage and mentor four students.
|
| A Characterization of a Java-Based Commercial Workload on a High-End Enterprise Server
[ ps |
pdf |
slides ] |
|
Ian M. Steiner and Yefim Shuf |
|
Processings of SIGMETRICS, June 2006.
|
|
Future Compilation Requirements for
Emerging Driving General Purpose Applications [ ps | pdf ]
|
|
I. Steiner
| |
University of Illinois, Masters Thesis, December 2005.
|
|
Characterizing the Memory Behavior of an Emerging Java-Based Commercial Workload on High-End Servers
|
|
I. Steiner and Y. Shuf
| |
The Second Watson Conference on Interaction between Architecture, Circuits, and Compilers (P=ac^2 2005), September 2005.
|
| Whole-Stack Analysis and Optimization of Commercial Workloads on Server Systems |
|
C. R. Attanasio, J.-D. Choi, N. Dubey, K. Ekanadham, M. Gupta, T. Inagaki, K. Ishizaki, J. Jann, R. D. Johnson, T. Nakatani, I. Park, P. Pattnaik, M. J. Serrano, S. E. Smith, I. Steiner, and Y. Shuf
| |
Network and Parallel Computing (NPC2004), 2004.
|
| Field-testing IMPACT EPIC Research Results in Itanium 2
[ ps |
pdf |
abstract ] |
|
John W. Sias, Sain-zee Ueng, Geoff A. Kent, Ian M. Steiner, Erik M. Nystrom and Wen-mei W. Hwu |
|
Proceedings of the 31st Annual International Symposium on Computer Architecture, July 2004.
|
|
