William Y. Chen

Graduated 8/93

Currently at:
Intel Corporation
RN6-18
2200 Mission College Blvd.
Santa Clara, CA 95052-8119
PH: (408) 765-4334
FAX: (408) 765-5165
Email: wchen@gomez.intel.com

Publications

Three Architectural Models for Compiler-Controlled Speculative Execution (PostScript version, PDF version)
P. P. Chang, N.J. Warter, S. A. Mahlke, W. Y. Chen, and W. W. Hwu
IEEE Transactions on Computers, Vol. 44, No. 4, April 1995, pp. 481-494
Abstract

The Importance of Prepass Code Scheduling for Superscalar and Superpipe lined Processors (PostScript version, PDF version)
P. P. Chang, D. M. Lavery, S. A. Mahlke, W. Y. Chen, and W. W. Hwu
IEEE Transactions on Computers, Vol. 44, No. 3, March 1995, pp. 353-370
Abstract

Dynamic Memory Disambiguation Using the Memory Conflict Buffer (PostScript version, PDF version)
D. M. Gallagher, W. Y. Chen, S. A. Mahlke, J. C. Gyllenhaal, W. W. Hwu
Proceedings of the 6th International Conference on Architecture Support for Programming Languages and Operating Systems, San Jose, California, October, 1994. pp.183-195.
Abstract

Profile-Assisted Instruction Scheduling (PostScript version, PDF version)
W. Y. Chen, S. A. Mahlke, N. J. Warter, S. Anik, and W. W. Hwu
International Journal for parallel Programming, Vol. 22, No. 2, April 1994, pp. 151-181
Abstract

Sentinel Scheduling: A Model for Compiler-Controlled Speculative Execution
S. A. Mahlke, W. Y. Chen, R. A. Bringmann, R. E. Hank, W. W. Hwu, B. R. Rau, and M. S. Schlansker
ACM Transactions on Computer Systems, Vol. 11, No. 4, Nov. 1993
Abstract

The Effect of Code Expanding Optimizations on Instruction Cache Design (PostScript version, PDF version)
W. Y. Chen, P.P. Chang, and W.W. Hwu
IEEE Transactions on Computers, Vol 42, No., Sept. 1993, pp.1045-1057
Abstract

The Superblock: An Effective Technique for VLIW and Superscalar Compilation (PostScript version, PDF version)
Wen-mei W. Hwu, Scott A. Mahlke, William Y. Chen, Pohua P. Chang, Nancy J. Warter, Roger A. Bringmann, Roland G. Ouellette, Richard E. Hank, Tokuzo Kiyohara, Grant E. Haab, John G. Holm, and Daniel M. Lavery
The Journal of Supercomputing, Kluwer Academic Publishers, 1993, pp. 229-248
Abstract

Data Preload for Superscalar and VLIW Processors (PostScript version, PDF version)
William Y. Chen
PhD thesis, Department of Computer Science, University of Illinois, Urbana IL, Sept. 1993
Abstract

Register Connection: A New Approach to Adding Registers into Instruction Set Architectures (PostScript version, PDF version)
Tokuzo Kiyohara, Scott Mahlke, William Chen, Roger Bringmann, Richard Hank, Sadun Anik, Wen-mei Hwu
Proceedings of the 20th Annual International Symposium on Computer Architecture, San Diego, CA, May 17-19, 1993, pp. 247-256
Abstract

Effective Compiler Support for Predicated Execution Using the Hyperblock (PostScript version, PDF version)
S. A. Mahlke, D. C. Lin, W. Y. Chen, R. E. Hank, and R. A. Bringmann
Proceedings of the 25th International Symposium on Microarchitecture, Dec. 1992, pp. 45-54
Abstract

Compiler Code Transformations for Superscalar-Based High-Performance Systems (PostScript version, PDF version)
Scott A. Mahlke, William Y. Chen, John C. Gyllenhaal, Wen-mei W. Hwu, P.P. Chang, and T.Kiyohara
Proceedings of Supercomputing 1992, Minneapolis, Minnisota, Nov. 16-20, 1992, pp. 808-817
Abstract

Sentinel Scheduling for VLIW and Superscalar Processors (PostScript version, PDF version)
Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu, B. Ramakrishna Rau, and Micheal S. Schlansker
Proceedings of the Fifth Int'l Conference on Architecture Support for Programming Languages and Operating Systems (ASPLOS-V), Boston, MA, Oct. 12-15, 1992, pp.238-247
Abstract

Tolerating First Level Memory Access Latency In High-Performance Systems (PostScript version, PDF version)
William Chen, Scott Mahlke, and Wen-mei Hwu
Proceedings of the 21st Annual Int'l Conference on Parallel Processing, St Charles, IL, Aug. 1992, pp.(I) 36-43
Abstract

Tolerating Data Access Latency with Register Preloading (PostScript version, PDF version)
William Y. Chen, Scott A. Mahlke, and Wen-mei W. Hwu
Proceedings of the 1992 Int'l Conf. on Supercomputing, Washington D.C., July, 1992, pp. 104-113
Abstract

Profile-Guided Automatic Inline Expansion for C Programs (PostScript version, PDF version)
Pohua P. Chang, Scott A. Mahlke, William Y. Chen, and Wen-mei W. Hwu
Software Practice and Experience, May 1992, Vol. 22, No. 5, pp. 349-369
Abstract

Scalar Program Performance on Muliple-Instruction-Issue Processors with a Limited Number of Registers (PostScript version, PDF version)
Scott A. Mahlke, William Y. Chen, Pohua P. Chang, and Wen-mei W. Hwu
Proceedings of the 25th Annual Hawaii Int'l Conference on System Sciences, Jan. 6-9, 1992, pp. 34-44
Abstract

Three Superblock Scheduling Models for Superscalar and Superpipelined Processors (PostScript version, PDF version)
Pohua P. Chang, Nancy J. Warter, Scott Mahlke, William Y. Chen, and Wen-mei W. Hwu
Technical Report CRHC-91-29, Coordinated Science Lab, University of Illinois, Urbana, IL, Dec. 1991
Abstract

Comparing Static And Dynamic Code Scheduling for Multiple-Instruction-Issue Processors (PostScript version, PDF version)
Pohua P. Chang, William Y. Chen, Scott A. Mahlke, and Wen-mei W. Hwu
Proceedings of the 24th Annual ACM/IEEE Int'l Symposium on Microarchitecture, Albuquerque, New Mexico, Nov. 18-20,1991, pp. 69-73
Abstract

Data Access Microarchitectures for Superscalar Processor with Compiler-Assisted Data Prefetching (PostScript version, PDF version)
William Y. Chen, Scott A. Mahlke, Pohua P. Chang, and Wen-mei W. Hwu
Proceedings of the 24th Annual ACM/IEEE Int'l Symposium on Microarchitecture, Albuquerque, New Mexico, Nov. 1991, pp. 69-73
Abstract

An Optimizing Compiler Code Generator: A platform for RISC Performance Analysis (PostScript version, PDF version)
William Y. Chen
MS thesis, Department of Computer Science, University of Illinois, Urbana IL, Sept. 1991

The Effect of Compiler Optimizations On Available Parallelism In Scalar Programs (PostScript version, PDF version)
Scott A. Mahlke, Nancy J. Warter, William Y. Chen, Pohua P. Chang, and Wen-mei W. Hwu
Proceedings of the 20th Annual Int'l Conference on Parallel Processing, St. Charles, IL, Aug. 12-16, 1991, pp. 142-145
Abstract

IMPACT: An Architectural Framework for Multiple-Instruction-Issue Processors (PostScript version, PDF version)
Pohua P. Chang, Scott A. Mahlke, William Y. Chen, Nancy J. Water, and Wen-mei W. Hwu
Proceedings of the 18th Annual Int'l Symposium on Computer Architecture, Toronto, Canada, May 28, 1991, pp. 266-275
Abstract

The Effect of Code Expanding Optimizations of Instruction Cache Design (PostScript version, PDF version)
William Y. Chen, Pohua Chang, Thomas M. Conte, and Wen-mei W. Hwu
Technical Report CRHC-91-17, Coordinated Science Lab, University of Illinois, Urbana, IL, May 1991
Abstract