ECE 497NC -- Unconventional Computer Architecture

Instructor: Nicholas Carter

Lectures: MW 3:30-4:50 in Everitt 143

Office Hours: By appointment

Syllabus: (Lecture notes are hyperlinked to lecture titles when available)

Note: Topics for later lectures may change somewhat, and some lectures will have to be rescheduled due to travel.

Lecture Date	Topic	Scribes	Discussion Leaders
1/21	Course Introduction	None	None
1/26	Transistor Scaling and its Limitations	Nick Carter	Nick Carter
1/28	The Impact of Fabrication Technology on Computer Architecture	Kelly Grussing	Tuan Bui
2/2	Processor-In-Memory Architectures 1: Rationale and Architectures	Love Kothari	Derek Gottlieb
2/4	Processor-In-Memory Architectures 2: Programming and Applications	Michal Tucknott	Nicholas Bray
Fri. 2/6	Reconfigurable Computing 1: Motivation and Concepts	Kapil Sachdeva	Brian Greskamp
2/9	NO CLASS
2/11	Reconfigurable Computing 2: Purely-Reconfigurable Systems	Joseph Grzywacz	Aalok Shah
Fri. 2/13	Reconfigurable Computing 3: Programmable-Reconfigurable Systems	Kshitiz Malik	Joseph Grzywacz
2/16	Reconfigurable Computing 4: Reconfigurable Array Design	Nicholas Bray	Daniel Hodges
2/18	Reconfigurable Computing 5: Compilation	Daniel Hodges	Kshitiz Malik
2/23	NO CLASS -- Nick at FPGA Conference
2/25	NO CLASS -- Nick at FPGA Conference
3/1	Reconfigurable Computing 6: Compilation 2	Justin Quek	Amit Patel
3/3	Reconfigurable Computing 7: Dynamic Reconfiguration	Adam Malinowski	Justin Quek
3/8	Biological Computing	Derek Gottlieb	Richard Kujoth
3/10	Computing with Non-Silicon Devices: Nanotubes 1	Brian Greskamp	Kelly Grussing
3/15	Computing with Non-Silicon Devices: Nanotubes 2	Aalok Shah	Love Kothari
3/17	Computing with Non-Silicon Devices: Quantum Cellular Automata	Tim Ernst	Liyang Lai
3/29	Computing with Non-Silicon Devices: Molecular Switches	Liyang Lai	Kapil Sachdeva
3/31	Computing with Non-Silicon Devices: System Architectures	Ben Miller	Adam Malinowski
4/5	Computing with Non-Silicon Devices: Magnetoelectronics	Juan Ruiz	Tim Ernst
4/7	Reversible Computing	Amit Patel	Charles Vitu and Kelly Grussing
4/12	Quantum Computing 1: Concepts	Richard Kujoth	Michael Tucknott
4/14	Quantum Computing 2: Applications	Charles Vitu	Ben Miller
4/19	Quantum Computing 3: Architectures	Weining Gu and Liyang Lai	Juan Ruiz
4/21	Quantum Computing 4: Experimental Successes	Tuan Bui	Weining Gu
4/26	NO CLASS -- Presentations moved to 5/6
4/28	NO CLASS -- Presentations moved to 5/6
5/3	NO CLASS -- Presentations moved to 5/6
5/5	NO CLASS -- Presentations moved to 5/6
5/6	Project Presentations all day in 141 CSL.	Schedule Below

Presentation Schedule -- May 6 in Room 141 CSL Time Group Title 9:15 -- 9:45 AM J. Ruiz, B. Miller The Performance Impact of a Simple Processor-In-Memory System 9:45 -- 10:15 AM N. Bray GPIM -- Graphics Processor in Memory 10:15 -- 10:45 AM A. Shah, C. Vitu, K. Grussing Adding Reconfigurable Logic to a Regular Microprocessor 10:45 -- 11:15 AM W. Gu, L. Lai, L. Wang Characterization of the FPGA Configuration Behavior Under Errors 11:15 -- 11:45 AM D. Hodges, A. Malinowski, A. Patel Reconfigurable Logic for Fault-Tolerant Processors 11:45 -- 1:15 Lunch Break 1:15 -- 1:45 PM L. Kothari, K. Malik Coarse-grained vs. Fine-grained RUs: where is the Rubicon? 1:45 -- 2:15 PM J. Quek, J. Grzywacz, K. Sachdeva Nimbus 2:15 -- 2:45 PM B. Greskamp, D. Gottlieb, R. Kujoth RC Kernel Selection and Scheduling 2:45 -- 3:15 PM T. Bui, M. Tucknott Fire and Forget Memory Operations for use With PIM Technology

Handouts

Term Project Guidelines

Assigned Readings:

Lecture 2: Transistor Scaling and its Limitations
(All of the papers for this lecture are from the November 2002 issue of the IBM Journal of Research and Development)

Maintaining the Benefits of CMOS Scaling When Scaling Bogs Down by E.J. Nowak.
Challenges and Future Directions for the Scaling of Dynamic Random-Access Memory (DRAM) by J.A. Mandelman, R.H. Dennard, G.B. Bronner, J.K. DeBrosse, R. Divakaruni, Y. Li, and C.J. Radens.
Beyond the Conventional Transistor by H.-S. P. Wong.

Lecture 3: The Impact of Fabrication Technology on Computer Architecture

The Future of Wires by Ron Ho, Kenneth W. Mai, and Mark A. Horowitz. Appeared in Proceedings of the IEEE, April 2001.
Clock Rate vs. IPC: The End of the Road for Conventional Microarchitectures by Vikas Agarwal, M.S. Hrishikesh, Stephen W. Keckler, and Doug Burger. Appeared in the 2000 International Symposium on Computer Architecture.
Effect of Increasing Chip Density on the Evolution of Computer Architectures by R. Nair. Appeared in the November 2002 issue of the IBM Journal of Research and Development.

Lecture 4: Processor-In-Memory Architectures 1

A Case for Intelligent RAM: IRAM by David Patterson, Thomas Anderson, Neal Cardwell, Richard Fromm, Kimberly Keeton, Christoforos Kozyrakis, Randi Thomas, and Katherine Yelick.
Active Pages: A Computation Model for Intelligent Memory by Mark Oskin, Frederic T. Chong, and Timothy Sherwood. Appeared in the Proceedings of the 1998 International Symposium on Computer Architecture.
FlexRAM Architecture Design Parameters by Seung-Moon Yoo, Jose Renau, Michael Huang, and Josep Torrellas.

Lecture 5: Processor-In-Memory Architectures 2

Exploiting ILP in Page-based Intelligent Memory by Mark Oskin, Justin Hensley, Diana Keen, Frederic T. Chong, Matthew Farrens, and Aneet Chopra.
Active Page Architectures for Media Processing by Justin Hensley, Mark Oskin, Diana Keen, Lucian-Vlad Lita, and Frederic T. Chong.
Automatic Code Mapping on an Intelligent Memory Architecture by Yan Solihin, Jaejin Lee, and Josep Torrellas. Appeared in the IEEE Transactions on Computers, Special Issue on High Performance Memory Systems, November 2001.

Lecture 6: Reconfigurable Computing 1

The Density Advantage of Configurable Computing by Andre DeHon. Appeared in the April 2000 issue of IEEE Computer.
Architecture of Field-Programmable Gate Arrays: The Effect of Logic Block Functionality on Area Efficiency by Jonathan Rose, Robert J. Francis, David Lewis, and Paul Chow. Appeared in the IEEE Journal of Solid-State Circuits, October 1990.
The Effect of Logic Block Architecture on FPGA Performance by Satwant Singh, Jonathan Rose, Paul Chow and David Lewis. Appeared in the IEEE Journal of Solid-Stane Circuits, March 1992.

Lecture 7: Reconfigurable Computing 2

Splash 2 by Jeffrey M. Arnold, Duncan A. Buell, and Elaine G. Davis. Appeared in the 4th Annual ACM Symposium on Parallel Algorithms and Architectures.
PipeRench: A Coprocessor for Streaming Multimedia Applications by Seth Copen Goldstein, Herman Schmit, Matthew Moe, Mihai Budiu, Srihari Cadambi, R. Reed Taylor, and Ronald Laufer. Appeared in the International Symposium on Computer Architecture, 1999.
A Defect-Tolerant Computer Architecture: Opportunities for Nanotechnology by James R. Heath, Phillip J. Kuekes, Gregory S. Snider, and R. Stanley Williams. Appeared in Science, June 12, 1998.

Lecture 8: Reconfigurable Computing 3

CHIMERAE: A High-Performance Architecture with a Tightly-Coupled Reconfigurable Functional Unit by Zhi Alex Ye, Andreas Moshovos, Scott Hauck, and Prithviraj Banerjee. Appeared in the 2000 International Symposium on Computer Architecture.
Garp: A MIPS Processor with a Reconfigurable Coprocessor by John R. Hauser and John Wawrzynek. Appeared in the IEEE Symposium on FPGAs for Custom Computing Machines, 1997.
Clustered Programmable-Reconfigurable Processors by Derek B. Gottlieb, Jeffrey J. Cook, Joshua D. Walstrom, Steven Ferrera, Chi-Wei Wang, Nicholas P. Carter. Appeared in the 2002 IEEE International Conference on Field-Programmable Technology.

Lecture 9: Reconfigurable Computing 4

Dynamically Programmable Gate Arrays: A Step Toward Increased Computational Density by Andre DeHon. Appeared in the Canadian Workshop of Field-Programmable Devices, 1996.
HSRA: High-Speed, Hierarchical Synchronus Reconfigurable Array by William Tsu, Kip Macy, Atul Joshi, Randy Huang, Norman Walker, Tony Tung, Omit Rowhani, Varghese George, John Wawrzynek, and Andre DeHon. Appeard in the Symposium on Field-Programmable Gate Arrays, 1999.
A Reconfigurable Unit for a Clustered Programmable-Reconfigurable Processor by Richard B. Kujoth, Chi-Wei Wang, Derek B. Gottlieb, Jeffrey J. Cook, Nicholas P. Carter. Appeared in the 2004 ACM International Symposium on Field-Programmable Gate Arrays.

Lecture 10: Reconfigurable Computing 5

Fast Compilation for Pipelined Reconfigurable Fabrics by Mihai Budiu and Seth Copen Goldstein. Appeared in the 1999 Symposium on Field Programmable Gate Arrays.
Fast Module Mapping and Placement for Datapaths in FPGAs by Timothy J. Callahan, Phillip Chong, Andre DeHon, and John Wawrzynek. Appeared in FPGA '98.
Parallelizing Applications into Silicon by Jonathan Babb, Martin Rinard, Andras Mortiz, Walter Lee, Matthew Frank, Rajeev Barua, and Saman Amarasinghe.

Lecture 11: Reconfigurable Computing 6

NAPA C: Compiling for a Hybrid RISC/FPGA Architecture by Maya B. Gokhale and Janice M. Stone. Appeared in the 1998 Symposium on Field-Programmable Custom Computing Machines.
Pipeline Vectorization for Reconfigurable Systems by M. Weinhardt and W. Luk. Appeared in the 1999 Symposium on Field-Programmable Custom Computing Machines.
Application-Specific Instruction Generation for Configurable Processor Architectures by Jason Cong, Yiping Fan, Guoling Han, and Zhiru Zhang. Appeared in the 2004 ACM International Symposium on Field-Programmable Gate Arrays

Lecture 12: Reconfigurable Computing 7

A Self-Reconfiguring Platform by Brandon Blodget, Philip James-Roxby, Eric Keller, Scott McMillan and Prasanna Sundararajan. Appeared in the 2003 International Conference on Field-Programmable Logic and Applications.
Run-Time Management of Dynamically Reconfigurable Designs by N. Shirazi, W. Luk, and P.Y.K. Cheung. Appeared in the 1998 International Conference on Field-Programmable Logic and Applications.
Heuristics for Online Scheduling Real-time Tasks to Partially Reconfigurable Devices by Christoph Steiger, Herbert Walder, and Marco Platzner. Appeared in the 2003 International Conference on Field-Programmable Logic and Applications.

Lecture 13: Biological Computing

Cellular Gate Technology by Thomas F. Knight, Jr. and Gerald Jay Sussman. Technical Report, MIT Artificial Intelligence Laboratory, 1997.
A Sticker Based Model for DNA Computation by Sam Roweis, Erik Winfree, Richard Burgoyne, Nickolas V. Chelyapov, Myron F. Goodman, Paul W. K. Rothemund, and Leonard M. Adleman. In DNA Based Computers: DMACS Workshop, 1996.
On Applying Molecular Computation To The Data Encryption Standard by Leonard M. Aldeman, Paul W. K. Rothemund, Sam Roweis, and Erik Winfree. In DNA Based Computers: DMACS Workshop, 1996.

Lecture 14: Computing With Non-Silicon Devices 1

Nanotubes for Electronics by Phillip G. Collins and Phaedon Avouris. Appeared in Scientific American, December 2000.
Carbon Nanotubes: Nanomechanics, Manipulation, and Electronic Devices by Ph. Avouris, T. Hertel, R. Martel, T. Schmidt, H.R. Shea, and R.E. Walkup. Appeared in Applied Surface Science, 1999.
Carbon Nanotube Inter- and Intramolecular Logic Gates by V. Derycke, R. Martel, J. Appenzeller, and Ph. Avouris. In Nano Letters.

Lecture 15: Computing With Non-Silicon Devices 2

Carbon Nanotube-Based Nonvolatile Random Access Memory for Molecular Computing by Thomas Rueckes, Kyoungha Kim, Ernesto Joselevich, Greg Y. Tseng, Chin-Li Chueng, and Charles M. Lieber. Appeared in Science, July 7 2000.
Engineering Carbon Nanotubes and Nanotube Circuits Using Electrical Breakdown by Phillip G. Collins, Michael S. Arnold, and Phaedon Avouris. Appeared in Science, April 27, 2001.
Directed Assembly of One-Dimensional Nanostructures into Functional Networks by Yu Huang, Xiangfeng Duan, Quingqiao Wei, and Charles M. Lieber. Appeared in Science, January 26, 2001.

Lecture 16: Computing With Non-Silicon Devices 3:

Digital Logic Gate Using Quantum-Dot Cellular Automata by Islamshah Amlani, Alexi O. Orlov, Geza Toth, Gary H. Bernstein, Craig S. Lent, and Gregory L. Snider. Appeared in Science, April 9, 1999.
Exploring and Exploiting Wire-Level Pipelining in Emerging Technologies by Michael Thaddeus Niemier and Peter M. Kogge. Appeared in the 2001 International Symposium on Computer Architecture.
Quantum-Dot Cellular Automata at a Molecular Scale by Marya Lieberman, Sudha Chellamma, Bindhu Varughese, Yuliang Wang, Craig Lent, Gary H. Bernstein, Gregory Snider, and Frank. C. Peiris. Appeared in the Annals of the N.Y. Acad. Sci., 960, 2002.

Lecture 17: Computing With Non-Silicon Devices 4:

Electrically Configurable Molecular-Based Logic Gates by C. P. Collier, E. W. Wong, M. Belohradsky, F. M. Raymo, J. F. Stoddart, P. J. Kuekes, R. S. Williams, and J. R. Heath. Appeared in Science, July 16, 1999.
Molecular Memories That Survive Silicon Device Processing and Real-World Operation by Zhiming Liu, Amir A. Yasseri, Jonathan S. Lindsey, and David F. Bocian. Appeared in Science, November 28 2003.
Digital Logic Using Molecular Electronics by Seth Copen Goldstein and Dan Rosewater. Appeared in ISSCC 2002.

Lecture 18: Computing With Non-Silicon Devices 5:

NanoFabrics: Spatial Computing Using Molecular Electronics by Seth Copen Goldstein and Mihai Budiu. Appeared in the 2001 International Symposium on Computer Architecture.
Array-Based Architecture for FET-Based Nanoscale Electronics by Andre DeHon. Appeared in the IEEE Transactions on Nanotechnology, March 2003.
Nanowire-Based Sublithiographic Programmable Logic Arrays by Andre DeHon and Michael J. Wilson. Extended version of a paper that appeared in the 2004 ACM International Symposium on Field-Programmable Gate Arrays.

Lecture 19: Computing With Non-Silicon Devices 6:

Magnetoelectronic Memories Last and Last by Mark Johnson. Appeared in IEEE Spectrum, February 2000.
Ultrahigh Density Vertical Magnetoresistive Random Access Memory by Jian-Gang Zhu, Youfeng Zheng, and Gary A. Prinz. Appeared in the Journal of Applied Physics, May 2000.
Reconfigurable Circuits Using Hybrid Hall Effect Devices" by Steve. P. Ferrera and Nicholas P. Carter. Appeared in the 2003 International Conference on Field Programmable Logic and Applications (FPL).
A Magnetoelectronic Macrocell Employing Reconfigurable Threshold Logic by Steve P. Ferrera and Nicholas P. Carter. Appeared in the 2004 ACM International Symposium on Field-Programmable Gate Arrays.

Lecture 20: Reversible Computing:

Mathematical Theory of Thermodynamics of Computation by Ming Li and Paul M.B. Vitanyi. Appeared in PhysCOMP92.
A PDF version of the above paper that may be easier to print.
Asymptotically Zero Energy Split-Level Charge Recovery Logic by Saed G. Younis and Thomas F. Knight, Jr. Appeared in the 1994 International Workshop on Low Power Design.
Pendulum: A Reversible Computer Architecture by Carlin James Vieri. Master's Thesis, Massachusetts Institute of Technology, 1995.

Lecture 21: Quantum Computing 1

A Quantum Conversation by Neil Gershenfeld. Appeared in Science, September 14, 2001.
The Quandary of Quantum Information by Charles Seife. Appeared in Science, September 14, 2001.
Quantum Computing by Gilles Brassard, Isaac Chuang, Seth Lloyd, and Christopher Monroe. Appeared in the Proceedings of the National Academy of Science USA, September 1998.
Quantum Information Theory: Results and Open Problems by Peter Shor. Appeared in Geometric Funct. Anal. (GAFA), Special Volume -- GAFA 2000.
(For Additional Information) Breakdown of Bell's Theorem for Certain Objective Local Parameter Spaces by Karl Hess and Walter Phillip. Appears in the Proceedings of the National Academy of Science, February 17, 2004

Lecture 22: Quantum Computing 2

Unconditional Security of Quantum Key Distribution over Arbitrarily Long Distances by Hoi-Kwong Lo and H. F. Chau. Appeared in Science, March 26 1999.
Polynomial-Time Algorithms for Prime Factorization and Discrete Logarithms on a Quantum Computer by Peter W. Shor. Expanded version of a paper from the 35th Annual Symposium on Fundations of Computer Science, 1994.
Quantum Algorithm for Clock Synchronization by Isaac L. Chuang. Appeared in Physics Review Letters, August 2000.

Lecture 23: Quantum Computing 3

Methodology for Quantum Logic Gate Construction by Xinlan Zhou, Debbie Leung, and Isaac Chuang. Appeared in Physics Review A, Volume 62, 052316, 2000.
A Practical Architecture for Reliable Quantum Computers by Mark Oskin, Fredrick T. Chong, and Isaac L. Chuang. Appeared in IEEE Computer, January 2002.
Resilient Quantum Computation by Emanuel Knili, Raymond Laflamme, and Wojciech H. Zurek. Appeared in Science, January 16, 1998.
Building Quantum Wires: The Long and Short of it by Mark Oskin, Frederic T. Chong, Isaac Chuang, and John Kubiatowicz. Appeared in the 2003 International Symposium on Computer Architecture.
The Effect of Communication Costs in Solid-State Quantum Computing Architectures by Dean Copsey, Mark Oskin, Frederic T. Chong, and Isaac Chuang. Appeared in the 2003 Symposium on Parallel Algorithms and Architectures.

Lecture 24: Quantum Computing 4

Toward Quantum Computation: A Five-Qbit Quantum Processor by Matthias Steffen, Lieven M.K. Vandersypen, and Isaac L. Chuang
Experimental Realization of an Order-Finding Algorithm with an NMR Quantum Computer by L.M.K. Vandersypen and I.L. Chuang. Appeared in Physics Review Letters, 2000.
Experimental Realization of Shor's Quantum Factoring Algorithm Using Nuclear Magnetic Resonance by L.M.K. Vandersypen, M. Steffen, G. Breyta, C.S. Yannoni, M. Sherwood, and I.L. Chuang. Appeared in Nature, 414, 2001