MemEPIC -- Memory-Efficient EPIC Processors:

EPIC processors offer the potential for substantial performance improvements over superscalar processors constructed in the same fabrication technology. However, the initial implementation of EPIC used in the IA-64 architecture requires substantially more memory than equivalent superscalar processors, making it unattractive for embedded applications. This project is investigating mechanisms to reduce the memory footprint of EPIC programs and to optimize the architecture for embedded applications. These mechanisms include a memory fill unit to manage data accesses for regular applications, and a "pre-decoded" execution mode to eliminate I-cache accesses and instruction decoding for inner loops. This is joint work with Wen-Mei Hwu, and is funded by the SRC.