IGATE GA-Based Power Estimation

Key Contributors

• Janak Patel
• Michael Hsiao
• Elizabeth Rudnick

Research Papers

A listing of all published IGATE research papers on power estimation is included below.

Peak power estimation of VLSI circuits: New peak power measures,
Michael S. Hsiao, Elizabeth M. Rudnick, and Janak H. Patel,
IEEE Transactions on VLSI Systems, vol. 8, no. 4, pp. 435-439, August 2000.

Effects of delay models on peak power estimation of VLSI sequential circuits,
Michael S. Hsiao, Elizabeth M. Rudnick, and Janak H. Patel,
Proceedings of the International Conference on Computer-Aided Design, pp. 45-51, November 1997.

K2: An estimator for peak sustainable power of VLSI circuits,
Michael S. Hsiao, Elizabeth M. Rudnick, and Janak H. Patel,
Proceedings of the International Symposium on Low Power Electronics and Design, pp. 178-183, August 1997.