HITEC Test Vectors
The HITEC sequential circuit test generator is described in the
following paper and dissertation:
-
HITEC: A test generation package for sequential
circuits,
Thomas M. Niermann and
Janak H. Patel,
Proceedings of the European Conference on Design Automation (EDAC),
pp. 214-218, February 1991.
-
Techniques for sequential circuit automatic test
generation,
Thomas M. Niermann,
Ph.D. dissertation, Department of Electrical and Computer Engineering,
Technical Report CRHC-91-8/UILU-ENG-91-2214,
University of Illinois, March 1991.
Last Updated: September 10, 1997
Send any questions to liz@uiuc.edu