GATEST Test Vectors

The GATEST sequential circuit test generator is described in the following paper and dissertation:

Sequential circuit test generation in a genetic algorithm framework,
Elizabeth M. Rudnick, Janak H. Patel, Gary S. Greenstein, and Thomas M. Niermann,
Proceedings of the ACM/IEEE Design Automation Conference, pp. 698-704, June 1994.

Simulation-based techniques for sequential circuit testing,
Elizabeth M. Rudnick,
Ph.D. dissertation, Department of Electrical and Computer Engineering, Technical Report CRHC-94-14/UILU-ENG-94-2229,
University of Illinois, August 1994.

ISCAS89 Circuits

ISCAS93 (ISCAS89 Addendum) Circuits

Synthesized Circuits


Last Updated: September 10, 1997
Send any questions to liz@uiuc.edu
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