High-Level Synthesis Benchmark Circuits

These circuits are generated from their behavioral/RTL descriptions written in VHDL. High-level synthesis is performed by Design Compiler and Behavioral Compiler from Synopsys Inc.

These designs have been used as benchmarks for the Illinois research in high-level test synthesis, and experimental results were presented in the following paper:

Enhancing high-level control-flow for improved testability
by Frank F. Hsu, Elizabeth M. Rudnick, and Janak H. Patel,
in Proceedings of the International Conference on CAD, pp. 322-328, November 1996.

High-level Variable Selection for Partial-Scan Implementation
by Frank F. Hsu, Janak H. Patel,
in Proceedings of the International Conference on CAD, November 1998.

The following circuits are modified versions of designs of the
1992 High-Level Synthesis Workshop Benchmarks The were synthesized and the results are shown in the ICCAD 96 paper.

• gcd circuit computes the greatest-common-divisor of two integers.
  
  • gcd: high-level and cell-level
  • gcd_x1: high-level and cell-level
  • gcd_x2: high-level and cell-level
  • gcd_y2: high-level and cell-level
• diffeq circuit is a design for a small fixed-point calculation loop.
  
  • diffeq: high-level and cell-level
  • diffeq_x1: high-level and cell-level
  • diffeq_x2: high-level and cell-level

The following circuits are modified versions of designs of the
1995 High-Level Synthesis Design Repository

• barcode is a barcode reader design.
  
  • barcode: high-level and cell-level
  • barcode_x1: high-level and cell-level
  • barcode_y1: high-level and cell-level
  • barcode_y2: high-level and cell-level
• dhrc performs differential heat release computation.
  
  • dhrc: high-level and cell-level
  • dhrc_x1: high-level and cell-level
  • dhrc_x2: high-level and cell-level
  • dhrc_y2: high-level and cell-level

The following circuits are modified versions of designs of the
1992 High-Level Synthesis Workshop Benchmarks, 1995 High-Level Synthesis Workshop Benchmarks, and a behavioral model of Intel 8085 microprocessor design. The experimental results are presented in the ICCAD 98 paper.

• am2910 is a microprogram address sequencer.
  
  • am2910: high-level and cell-level
  • am2910_x4: high-level and cell-level
• barcode is a barcode reader design.
  
  • barcode: high-level and cell-level
  • barcode_x1: high-level and cell-level
  • barcode_x2: high-level and cell-level
  • barcode_x3: high-level and cell-level
  • barcode_x4: high-level and cell-level
• dhrc performs differential heat release computation.
  
  • dhrc: high-level and cell-level
  • dhrc_x2: high-level and cell-level
  • dhrc_x3: high-level and cell-level
• diffeq solves a particular differential equation.
  
  • diffeq: high-level and cell-level
  • diffeq_x3: high-level and cell-level
  • diffeq_x4: high-level and cell-level
• gcd computes the greatest-common-divisor of two numbers.
  
  • gcd: high-level and cell-level
  • gcd_x3: high-level and cell-level
  • gcd_x4: high-level and cell-level
• kalman is an implementation of the Kalman filter.
  
  • kalman: high-level and cell-level
  • kalman_x1: high-level and cell-level
  • kalman_x1: high-level and cell-level
• lru is part of a cache controller that finds the least-recently used item in the cache.
  
  • lru: high-level and cell-level
  • lru_x1: high-level and
  • lru_x2: high-level and cell-level
  • lru_x3: high-level and cell-level
• prawn is a simple eight-bit microprocessor.
  
  • prawn: high-level and cell-level
  • prawn_x1: high-level and cell-level