Our current research projects are:
Students:
I am actively looking for students to join my research
group. Students intending to pursue a Ph.D. are strongly
preferred, although Masters-only students will be considered.
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Research Interests
My Unconventional Computer Architecture group focuses on architectures
that do not follow the stored-program paradigm common in today's
computer systems. Our interests include physical implementations of
computation such as reconfigurable logic, integration of
unconventional computing devices with conventional processors, and
computing using non-silicon devices.
Areas of interest to me, but that I do not have ongoing projects in
include:
Magnetoelectronic devices (circuit elements that combine ferromagnetic
materials with semiconductor structures) have the potential to address
three key limitations of CMOS electronics: their vulnerability to
state loss on power failures, the increasing contribution of leakage
current to system power, and incorrect operation caused by
radiation-induced soft errors. This project is developing logic
designs and system architectures that combine CMOS transistors and
magnetoelectronic devices to deliver high performance, non-volatile
operation, and resistance to radiation-induced errors.
Future computer systems will be heterogeneous, consisting of multiple
independent execution units and memories that are integrated onto a
single chip. The Intelligent Queues project is developing a set of
program-controlled communication abstractions that will allow
programmable processors, reconfigurable logic, custom circuits,
sensors, and transcievers to be composed into a variety of
heterogeneous computing systems. We expect that this abstraction will
reduce design effort and improve performance by supporting reuse of
hardware components, reducing the number of accesses to main memory
for both data and synchronization, and enabling the use of
unconventional execution units such as reconfigurable logic to
accelerate programs.
Previous projects (or projects that are ongoing but winding down):
Reconfigurable logic
offers the potential for substantial performance improvements over
traditional programmable processors for applications that have
substantial data parallelism or whose natural data width does not
match the data width of a programmable processor. However, the
performance and area advantages of fixed-purpose logic for
computations that match the logic's data width or that are too
irregular to map well onto reconfigurable logic argue that a
combination of programmable processors and reconfigurable logic should
give the best performance on a wide variety of applications. This
project is investigating architectural mechanisms for integrating
programmable processors and reconfigurable logic onto the same chip,
as well as programming/synthesis tools to compile programs to a
mixed-technology processor.